1. Field of the Invention
The present invention relates to a capacitor in a semiconductor integrated circuit, and to a method of manufacturing the capacitor.
2. Description of the Related Art
Semiconductor memory devices are considered one of the crucial microelectronics components for mainframe computers, PCs, telecommunications, automotive and consumer electronics, and commercial and military avionics systems. Semiconductor memory devices can be characterized into either volatile random access memory devices (RAMs) or non-volatile memory devices (NVMs). RAMs can be divided into dynamic RAMs (DRMAs) and static RAMs (SRAMs). As is well known, the integration density of DRAMs is about four times as high as the integration density of SRAMs. As a consequence, DRAMs have been widely used in the memory devices of computer mainframe""s memory.
Like in other memory devices, DRAMs include a cell array region having a plurality of memory cell arrays, and a peripheral circuit region controlling and driving the memory cell arrays. Each memory cell typically consists of a cell storage capacitor and an access transistor. The cell storage capacitor directly affects DRAM characteristics such as data retention, soft error rate, low voltage performance, and the like. Namely, higher capacitance of the cell capacitor improves the data retention characteristics and the low voltage characteristics, and it reduces the soft error rate. Accordingly, in order to realize high density DRAM devices, it usually is necessary to form a high performance cell capacitor with an acceptable level of capacitance in a given cell.
U.S. Pat. No. 5,185,282 by Lee et al., entitled xe2x80x9cMETHOD OF MANUFACTURING DRAM CELL HAVING A CUP SHAPED POLYSILICON STORAGE ELECTRODE,xe2x80x9d the disclosure of which is incorporated herein by reference, discloses a double cylindrical capacitor storage electrode. According to Lee et al., a first polysilicon layer, useful as an outer cylindrical storage electrode, is formed in a storage electrode hole. An oxide layer is formed on the first polysilicon layer. Then, the respective layers are anisotropically etched to form an oxide sidewall spacer on the first polysilicon layer. A second polysilicon layer, useful as an inner cylindrical storage electrode, then is formed on the bottom of the first cylindrical polysilicon layer and on the oxide sidewall spacer. Then, the oxide sidewall spacer is selectively removed to form a double cylindrical capacitor storage electrode. The bottom of the outer cylindrical storage electrode is directly in contact with the inner cylindrical storage electrode.
There can be some problems, however, with the method disclosed in Lee, et al. For example, since an anisotropic etching process forms the oxide spacer, there may be some etching damage on the bottom of the outer cylindrical storage electrode. This is because the anisotropic etching process typically is performed by a RIE (reactive ion etching) technique. Accordingly, etching by-products and the like may remain on the bottom of the outer cylindrical storage electrode during anisotropic etching, thereby causing contact failure between the outer cylindrical storage electrode and the inner cylindrical storage electrode. By-products can be removed by using a cleaning solution suitable for an oxide. However, over-cleaning is required to ensure complete removal of the by-products, thereby varying the thickness of the oxide spacer. Indeed, the oxide spacer can be completely removed in severe cases. As a result, it becomes very difficult to control the width of the spacer between the outer cylindrical storage electrode and the inner cylindrical storage electrode.
The present invention was made in view of the above-mentioned problems and it is a feature of an embodiment of the present invention to provide a method of manufacturing a capacitor that can improve contact resistance characteristics between an outer storage electrode and an inner storage electrode. It is another feature of an embodiment of the present invention to provide a method of manufacturing a capacitor that can ensure uniform inter-wall space between an outer storage electrode and an inner storage electrode. It is yet another feature of an embodiment of the present invention to provide a capacitor having a stable storage electrode.
In accordance with these and other features of the present invention, there is provided a method of manufacturing a capacitor in a semiconductor integrated circuit. A method of an embodiment of the invention includes first providing a semiconductor substrate having disposed thereon an interlayer insulating layer an upper etching stopper layer and a lower sacrificial insulating layer then are sequentially formed on the interlayer insulating layer on the semiconductor substrate the lower sacrificial insulating layer and the upper etching stopper layer then are sequentially patterned to form a storage electrode hole, and to expose a predetermined portion of the interlayer insulating layer. The method then includes forming an outer cylindrical storage electrode in the storage electrode hole, a conductive liner surrounded by the outer cylindrical storage electrode, and an inner storage electrode surrounded by the conductive liner. Finally, the method of an embodiment of the invention includes selectively etching the conductive liner to expose an inner sidewall of the outer cylindrical storage electrode and an outer sidewall of the inner storage electrode.
In accordance with an additional feature of an embodiment of the invention, there is provided a capacitor of a semiconductor integrated circuit that includes a semiconductor substrate, and an outer cylindrical storage electrode formed on the semiconductor substrate. In the capacitor of the invention, an inner storage electrode is disposed within and spaced apart from the outer cylindrical storage electrode, and a conductive liner residue is interposed between a bottom of the outer cylindrical storage electrode and a bottom of the inner storage electrode. The conductive liner residue electrically connects the outer cylindrical storage electrode to the inner storage electrode. Depending on the storage electrode dimension, the inner storage electrode can exhibit a circular columnar configuration or a cylindrical configuration.